Próbuje przy pomocy atmegi328p z kwarcem 11,0592MHz porozumieć się z ade7763 przy pomocy SPI. W nocie znalazłem, że należy ustawić bit CPHA. Delaye po każdym zapisie/odczycie według noty powinny wynosić 4us, które również są. Niestety od ade otrzymuje w odpowiedzi losowe liczby.
Czy ktoś miał może podobny problem?
schemat: http://prntscr.com/905kt7 zapomniałem o wartości R1=10k
kod:
main.c
[syntax=c]#include <stdlib.h>
#include <avr/io.h>
#include <avr/interrupt.h>
#include <util/delay.h>
#include "UART/UART.h"
//#include "terminal/tr.h"
#include "SPI/spi.h"
#include "ade7763.h"
unsigned char data;
int main(){
sei();
UART_init();
SpiInit();
while(1){
UART_sendstr("Read: ");
CS_L;
_delay_us(10);
Read_SPI(0x3f, &data, 1);
_delay_us(10);
CS_H;
_delay_ms(2000);
}
}[/syntax]
ade7763.h
[syntax=c]#ifndef ADE7763_H_
#define ADE7763_H_
#define DEBUG 0
// SPI definitions
#define SCK PB5
#define MISO PB4
#define MOSI PB3
#define CS PB2
#define CS_PORT PORTB
#define CS_DDR DDRB
#define CS_PIN (1<<CS);
#define CS_L CS_PORT &= ~CS_PIN
#define CS_H CS_PORT |= CS_PIN
//
//Analog Devices ADE7763 Energy Meter Chip
//****************************************
//
//MR_ = Meter Register
//
//In general, names and abbreviations are as used in ADE7763 data sheet
//
//
//Register Address Definitions
//
#defineMR_Reserv000x00
#defineMR_WFORM 0x01
#defineMR_AENERGY 0x02
#defineMR_RAENERGY 0x03
#defineMR_LAENERGY 0x04
#defineMR_VAENERGY 0x05
#defineMR_RVAENERGY 0x06
#defineMR_LVAENERGY 0x07
#defineMR_Reserv08 0x08
#defineMR_MODE 0x09
#defineMR_IRQEN 0x0A
#defineMR_STATUS 0x0B
#defineMR_RSTATUS 0x0C
#defineMR_CH1OS 0x0D
#defineMR_CH2OS 0x0E
#defineMR_GAIN 0x0F
#defineMR_PHCAL 0x10
#defineMR_APOS 0x11
#defineMR_WGAIN 0x12
#defineMR_WDIV 0x13
#defineMR_CFNUM 0x14
#defineMR_CFDEN 0x15
#defineMR_IRMS 0x16
#defineMR_VRMS 0x17
#defineMR_IRMSOS 0x18
#defineMR_VRMSOS 0x19
#defineMR_VAGAIN 0x1A
#defineMR_VADIV 0x1B
#defineMR_LINCYC 0x1C
#defineMR_ZXTOUT 0x1D
#defineMR_SAGCYC 0x1E
#defineMR_SAGLVL 0x1F
#defineMR_IPEAKLVL 0x20
#defineMR_VPEAKLVL 0x21
#defineMR_IPEAK 0x22
#defineMR_RIPEAK 0x23
#defineMR_VPEAK 0x24
#defineMR_RVPEAK 0x25
#defineMR_TEMP 0x26
#defineMR_PERIOD 0x27
#defineMR_Reserv28 0x28
#defineMR_Reserv29 0x29
#defineMR_Reserv2A 0x2A
#defineMR_Reserv2B 0x2B
#defineMR_Reserv2C 0x2C
#defineMR_Reserv2D 0x2D
#defineMR_Reserv2E 0x2E
#defineMR_Reserv2F 0x2F
#defineMR_Reserv30 0x30
#defineMR_Reserv31 0x31
#defineMR_Reserv32 0x32
#defineMR_Reserv33 0x33
#defineMR_Reserv34 0x34
#defineMR_Reserv35 0x35
#defineMR_Reserv36 0x36
#defineMR_Reserv37 0x37
#defineMR_Reserv38 0x38
#defineMR_Reserv39 0x39
#defineMR_Reserv3A 0x3A
#defineMR_Reserv3B 0x3B
#defineMR_Reserv3C 0x3C
#defineMR_TMODE 0x3D
#defineMR_CHKSUM 0x3E
#defineMR_VERSION 0x3F
//
//MR_GAIN register bits
//
//High 3 bits are voltage (channel 2) gain
//Middle two bits are full-scale select for current (channel 1)
//Low 3 bits are current (channel 1) gain
#defineMR_GAIN_V10X00
#defineMR_GAIN_V20X20
#defineMR_GAIN_V40X40
#defineMR_GAIN_V80X60
#defineMR_GAIN_V160X80
#defineMR_GAIN_FS_HALF0X00// 0.5V
#defineMR_GAIN_FS_QUARTER0X08// 0.25V
#defineMR_GAIN_EIGHTH0X10// 0.125V
#defineMR_GAIN_I10X00
#defineMR_GAIN_I20X01
#defineMR_GAIN_I40X02
#defineMR_GAIN_I80X03
#defineMR_GAIN_I160X04
//
//MODE register bits
//
//There are valid combinations of the SWAP and A/D disable functions,
//which would not be used during normal operation.
//
//ADE7763 default at power-up: 0x000C ==> DISCF + DISSAG
//
#defineMR_MODE_DISHPF0x0001//High-pass filter HPF1 disabled when set
#defineMR_MODE_DISLPF20x0002//Low-pass filter LPF2 disabled when set
#defineMR_MODE_DISCF0x0004//CF output disabled when set (default)
#defineMR_MODE_DISSAG0x0008///SAG output disabled when set (default)
#defineMR_MODE_ASUSPEND0x0010//Suspend (sleep) ADCs when set
#defineMR_MODE_TEMPSEL0x0020//Start a temperature conversion when set ("ADCSC")
#defineMR_MODE_SWRST0x0040//Software Chip Reset
#defineMR_MODE_CYCMODE0x0080//Line Cycle Energy Accumulation Mode
#defineMR_MODE_DISCH10x0100//Short analog inputs, current channel
#defineMR_MODE_DISCH20x0200//Short analog inputs, voltage channel
#defineMR_MODE_SWAP0x0400//Swap voltage & current channels
#defineMR_MODE_DTRT_28K0x0000//Default: 27.9ksps (CLKIN/128)
#defineMR_MODE_DTRT_14K0x0800//
#defineMR_MODE_DTRT_7K0x1000//
#defineMR_MODE_DTRT_3K0x1800//
#defineMR_MODE_WAVSEL_ACTIVE0x0000// Waveform select
#defineMR_MODE_WAVSEL_CH10x4000//
#defineMR_MODE_WAVSEL_CH20x6000//
#defineMR_MODE_POAM0x8000//Positive-power Only Accumulation Mode
//
// STATUS (& RSTATUS & IRQEN) register bits
//
//(also used to set the interrupt MASK register.
//For the MASK, set the bit if an IRQ should be generated for
//the corresponding event. Only _RESET does not apply.)
//
#defineMR_STATUS_AEHF0x0001// AENERGY accumulator is half-full
#defineMR_STATUS_SAG0x0002// Voltage sag below threshold
#defineMR_STATUS_CYCEND0x0004 // End of LINECYC half-line cycles
#defineMR_STATUS_WSMP0x0008// Waveform samples data ready
#defineMR_STATUS_ZX0x0010// Zero crossing occurred (also ZX output)
#defineMR_STATUS_TEMP0x0020// Temperature data ready
#defineMR_STATUS_RESET0x0040// End of software/hardware reset
#defineMR_STATUS_AEOF0x0080// AENERGY accumulator has overflowed
#defineMR_STATUS_PKV0x0100// Peak voltage has been exceeded
#defineMR_STATUS_PKI0x0200// Peak current has been exceeded
#defineMR_STATUS_VAEHF0x0400// VAENERGY accumulator is half full
#defineMR_STATUS_VAEOF0x0800// VAENERGY accumulator has overflowed
#defineMR_STATUS_ZXTO0x1000 // Zero crossing time-out occurred
#defineMR_STATUS_PPOS0x2000// Power negative to positive
#defineMR_STATUS_PNEG0x4000// Power positive to negative
#defineMR_STATUS_UNUSED0x8000// Reserved bit
void Read_SPI(char addr, unsigned char *data, uint8_t bytes);
void Write_SPI(char Address,char DataByte);
void spiWrite(char byte);
void SpiInit();
#endif /* ADE7763_H_ */[/syntax]
ade7763.c
[syntax=c]#include <avr/io.h>
#include <avr/interrupt.h>
#include <util/delay.h>
#include "ade7763.h"
#include "SPI/spi.h"
#include "UART/UART.h"
void SpiInit(){
/* Set MOSI, SCK, CS output, all others input */
DDRB |= (1<<MOSI)|(1<<SCK)|(1<<CS);
CS_H;
/* Enable SPI, Master, set clock rate fck/8 */
SPCR |= (1<<SPE)|(1<<MSTR)|(1<<SPR0)|(1<<CPHA);
SPSR |= (1<<SPI2X);
#if DEBUG == 1
UART_sendstr("SPI init done\n\r");
#endif
}
void spiWrite(char byte)
{
// Put data to SPI data register
SPDR = byte;
// Wait until the data are transmitted
while(!(SPSR & (1<<SPIF)));
}
char spiRead()
{
// Wait until the data are transmitted
while(!(SPSR & (1<<SPIF)));
return SPDR;
}
void Write_SPI(char addr,char DataByte)
{
//adding MSB to the address
addr |= 0x80; // 10xx xxxx
spiWrite(addr);
// Minimum time between the end of data byte transfers.
_delay_us(4);
spiWrite(DataByte);
}
void Read_SPI(char addr, unsigned char *data, uint8_t bytes)
{
spiWrite(addr); // 00xx xxxx
_delay_us(4);
for(uint8_t i = 0; i < bytes; i++)
{
// read one byte
data[i] = spiRead();
_delay_us(4); // Minimum time between read command
}
#if DEBUG == 1
UART_sendstr("read...\n\r");
UART_sendint(*data);
UART_sendstr("\n\r");
#endif
//return SPDR;
}[/syntax]Statystyki: Napisane przez Def — 7 lis 2015, o 20:21
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