Próbuję zaimplementować całość do atmeg 168, mam problem z odczytem w urządzeniu odbiorczym. Układ nadawczy ma cyklicznie wysyłać dane do odbiornika. Po analizie z oscyloskopem wygląda na to, że jest przerwanie na wyprowadzeniu DIO2 (FifoNotEmpty) w trakcie wysylania i pojawia się sygnał na wyjściu antenowym (wiem że częstotliwość przekracza możliwości oscyloskopu, ale coś się zmienia więc zakładam, że uklada nadawczy działa
)Problem mam po stronie odbiornika tzn. nie pojawia się przerwanie na wyprowadzeniu DIO0 (PayloadReady), ani na DIO2. Czym to może być spowodowane ?
Poniżej zamieszczam listingi do programu:
Kod nadajnika:
[syntax=c]#define F_CPU 10000000L
#include <avr/io.h>
#include <string.h>
#include <avr/interrupt.h>
#include <inttypes.h>
#include <util/delay.h>
#include "RFM69registers.h"
#define SS(1<<PD1)
#define MOSI(1<<PB3)
#define MISO(1<<PB4)
#define SCK(1<<PB5)
#define FXOSC 32UL
#define FRF(x) (x*524288UL/FXOSC)
#define NodeAddress 0x02 //w drugim na odwrot
#define ReceiverAddress 0x01 //w drugim na odwrot
#define BroadcastAddress 0xFF
//RegOpMode(0x01)
//4-2 Mode
#define SLEEP (0b000<<2) //Sleep mode (SLEEP)
#define STDBY (0b001<<2) //Standby mode (STDBY)
#define FS (0b010<<2) //Frequency Synthesizer mode (FS)
#define TX (0b011<<2) //Transmitter mode (TX)
#define RX (0b100<<2) //Receiver mode (RX)
//RegDioMapping1(0x25)
//7-6 Dio0Mapping
#define RxDio0PayloadReady (0b01<<6)
#define TxDio0PackedSend (0b00<<6)
//RegSyncConfig(0x2e)
//7 SyncOn
#define SyncON (1<<7)
#define SyncOFF (0<<7)
//6 FifoFillCondition
//5-3 SyncSize
#define Sync8byte (0b111<<3)
//2-0 SyncTol
//RegPacketConfig1(0x37)
//7 PacketFormat
#define FixedLength (0<<7 ) //Fixed length
#define VariableLength (1<<7) //Variable length
//6-5 DcFree
#define DcFreeOFF (0b00<<5) //None (Off)
#define Manchester (0b01<<5) //Manchester
#define Whitening (0b10<<5) //Whitening
//4 CrcOn
#define CrcOFF (0<<4) //Off
#define CrcON (1<<4) //On
//3 CrcAutoClearOff
#define ClearON (0<<3) //Clear FIFO and restart new packet reception
#define ClearFF (1<<3) //Do not clear FIFO. PayloadReady interrupt issued
//2-1 AddressFiltering
#define AddressOFF (0b00<<1) //None (Off)
#define AddressNode (0b01<<1) //Address field must match NodeAddress
#define AddressNodeBroadcast (0b10<<1) //Address field must match NodeAddress or BroadcastAddress
const uint8_t RFM69ConfigTable[][2] = {
{REG_BITRATEMSB, 0x34}, //32MHz/0x3410 = 2.4kpbs
{REG_BITRATELSB, 0x10},
{REG_FDEVMSB, 0x02}, //241*61Hz = 35KHz
{REG_FDEVLSB, 0x41},
{REG_FRFMSB, 0xD9}, //868MHz
{REG_FRFMID, 0x00},
{REG_FRFLSB, 0x00},
{REG_LNA, 0x88}, //200R Auto gain
{REG_RXBW, 0x52}, //83KHz
{REG_AFCBW, 0x8B}, //recommended value
{REG_DIOMAPPING1, RxDio0PayloadReady},
{REG_RSSITHRESH, 0xEC}, //118dBm
{REG_PREAMBLEMSB, 0x00}, //5 PreambleBytes
{REG_PREAMBLELSB, 0x05},
{REG_SYNCCONFIG, SyncON | Sync8byte}, //On, 8B, no errors
{REG_SYNCVALUE1, 'A'}, //SyncWord = Network ID
{REG_SYNCVALUE2, 'T'},
{REG_SYNCVALUE3, 'N'},
{REG_SYNCVALUE4, 'E'},
{REG_SYNCVALUE5, 'L'},
{REG_SYNCVALUE6, '.'},
{REG_SYNCVALUE7, 'P'},
{REG_SYNCVALUE8, 'L'},
{REG_PACKETCONFIG1, VariableLength | Whitening | CrcON | ClearON | AddressNodeBroadcast},
{REG_PAYLOADLENGTH, 66},
{REG_NODEADRS, NodeAddress},
{REG_BROADCASTADRS, BroadcastAddress},
{REG_FIFOTHRESH, 0x9F},
{RegTestLna, 0x1B}, //Normal sensitivity
{REG_TESTDAGC, 0x30}, //Improved DAGC
{REG_OPMODE, STDBY}
};
volatile uint8_t ActiveTx, ActiveRx, DataReady;
uint8_t buffer[49]; //bufor z odebranymi danymi ( w main dodac extern buffer[49]; )
void spi_tx(uint8_t data) {
SPDR = data;
while ( !(SPSR & (1<<SPIF)) );
}
uint8_t spi_rx(void) {
while ( !(SPSR & (1<<SPIF)) );
return SPDR;
}
//! zapisuje bajt do modułu pod określony adres
/*!
\param address - adres docelowy
\param data - dane do zapisania
*/
void RFM69_write(uint8_t address, uint8_t data)
{
// DDRB|= 0b00000010;
// PORTB|= 0b00000010;
PORTD &= ~SS;
SPDR = address | 0x80; //dla zapisu adres ma MSB = 1
while( !(SPSR & (1<<SPIF)) );
SPDR = data;
while( !(SPSR & (1<<SPIF)) );
PORTD |= SS;
}
//! odczytuje bajt z określonego adresu modułu
/*!
\param address - adres docelowy
\return - dane spod adresu
*/
uint8_t RFM69_read(uint8_t address)
{
uint8_t data;
PORTD &= ~SS;
while( !(SPSR & (1<<SPIF)) ); //odczekanie na zakończenie wcześniejszej transmisji
SPDR = address;
while( !(SPSR & (1<<SPIF)) );
SPDR = 0x00; //dowolna wartość
while( !(SPSR & (1<<SPIF)) );
data = SPDR;
PORTD |= SS;
return data;
}
//! ustawia czestotliwosc pracy
/*!
\param frequency - czestotliwosc FRF(x) np. FRF(868)
*/
void RFM69_Freq(uint32_t frequency)
{
RFM69_write(RegFrfMsb, (uint8_t)(frequency>>16));
RFM69_write(RegFrfMid, (uint8_t)(frequency>>8));
RFM69_write(RegFrfLsb, (uint8_t)frequency);
}
const uint8_t RFM69RxTable[][2] = {
{RegDioMapping1, RxDio0PayloadReady},
{RegPaLevel, 0x9F},
{RegTestPa1, 0x55},
{RegTestPa2, 0x70},
{RegOpMode, RX}
};
const uint8_t RFM69TxTable[][2] = {
{RegDioMapping1, TxDio0PackedSend},
{RegPaLevel, 0x9F},
{RegTestPa1, 0x55},
{RegTestPa2, 0x70},
{RegOpMode, TX}
};
//! ustawia domyslne wartosci rejestrow modulu
void RFM69_Config(void) {
for ( uint8_t i = 0; i < sizeof(RFM69ConfigTable)/2; i++)
RFM69_write(RFM69ConfigTable[i][0], RFM69ConfigTable[i][1]);
}
//! czysci FIFO modulu
/*!
ustawia w tryb odbioru
*/
void RFM69_ClearFIFO(void) {
RFM69_write(RegOpMode, STDBY); //Entry Standby Mode
RFM69_write(RegOpMode, RX); //Change to Rx Mode
}
//! ustawia tryb uspienia
void RFM69_Sleep(void) {
RFM69_write(RegOpMode, SLEEP); //sleep mode
}
//! ustawia tryb gotowosci
void RFM69_Standby(void) {
RFM69_write(RegOpMode, STDBY); //standby mode
}
//! ustawia tryb odbioru
void RFM69_Rx(void) {
for (uint8_t i = 0; i < sizeof(RFM69RxTable)/2; i++) //config RFM69 RxMode parameters
RFM69_write(RFM69RxTable[i][0], RFM69RxTable[i][1] );
}
//! wysyla dane na podany adres wezla
/*!
\param address - adres wezla
\param *data - wskaznik do bufora z danymi
\param length - ilosc bajtow do wyslania, jak 0 to bufor traktowany jest jak C-String, max 48 znakow
\return - 0 sukces, 1 - za duzo danych, 2 - odbior w toku, 3 - nadawanie w toku
*/
uint8_t RFM69_Send(uint8_t address, uint8_t * data, uint8_t length) {
if(!length) length = strlen((char *)data);
if(length > 48) return 1;
if(ActiveRx) return 2;
if(ActiveTx) return 3;
PORTB&= ~0b00000010;
ActiveTx = 1;
RFM69_Standby();
RFM69_write(RegFifo, length + 1);
RFM69_write(RegFifo, address);
if(length) //byte data
{
for(uint8_t i = 0; i < length; i++)
RFM69_write(RegFifo, data[i]);
}
else //C-String
{
while(*data)
{
RFM69_write(RegFifo, *data);
data++;
}
}
for (uint8_t i = 0; i < sizeof(RFM69TxTable)/2; i++) //config RFM69 TxMode parameters
RFM69_write(RFM69TxTable[i][0], RFM69TxTable[i][1]);
return 0;
}
//! odczytuje dane z FIFO modulu do bufora
/*!
ustawia zmienna DataReady i umieszca w niej ilosc odebranych bajtow
\param *data - wskaznik do bufora z danymi
*/
void RFM69_Read(uint8_t * data) {
uint8_t length, address;
uint8_t i;
ActiveRx = 1;
length = RFM69_read(RegFifo);
address = RFM69_read(RegFifo);
for(i = 0; i < length - 1; i++)
data[i] = RFM69_read(RegFifo);
data[i] = '\0';
RFM69_ClearFIFO();
DataReady = length - 1;
ActiveRx = 0;
}
//! funkcja obslugi przerwania / zbocze narastajace DIO0
/*!
obsluguje odbieranie danych i przelaczanie w tryb odbioru
*/
ISR(INT0_vect)
{
extern uint8_t buffer[49];
if(ActiveTx)
{
ActiveTx = 0;
RFM69_Standby();
RFM69_Rx();
}
else
{
RFM69_Read(buffer);
}
}
void spi_init(void) {
DDRD|= SS;
PORTD|= SS;
DDRB |= MOSI|SCK|(1<<PB2); // PB2 to domyślny CS który musi byc wyjściem inaczej się zwiesza SPI
DDRB &=~MISO;
SPCR |= (1<<SPE)|(1<<MSTR)|(1<<SPR0);
}
int main(void)
{
//konfiguracja spi , przerwan i modulu
spi_init();
RFM69_Config();
RFM69_Freq(FRF(868));
while (1) {
_delay_ms(100);
RFM69_Send(BroadcastAddress, "ananas", 0);
ActiveTx = 0;
RFM69_Standby();
_delay_ms(100);
}
}[/syntax]
Kod odbiornika:
[syntax=c]#define F_CPU 10000000L
#include <avr/io.h>
#include <string.h>
#include <avr/interrupt.h>
#include <inttypes.h>
#include <util/delay.h>
#include "RFM69registers.h"
#define SS(1<<PD1)
#define MOSI(1<<PB3)
#define MISO(1<<PB4)
#define SCK(1<<PB5)
#define FXOSC 32UL
#define FRF(x) (x*524288UL/FXOSC)
#define NodeAddress 0x01 //w drugim na odwrot
#define ReceiverAddress 0x02 //w drugim na odwrot
#define BroadcastAddress 0xFF
//RegOpMode(0x01)
//4-2 Mode
#define SLEEP (0b000<<2) //Sleep mode (SLEEP)
#define STDBY (0b001<<2) //Standby mode (STDBY)
#define FS (0b010<<2) //Frequency Synthesizer mode (FS)
#define TX (0b011<<2) //Transmitter mode (TX)
#define RX (0b100<<2) //Receiver mode (RX)
//RegDioMapping1(0x25)
//7-6 Dio0Mapping
#define RxDio0PayloadReady (0b01<<6)
#define TxDio0PackedSend (0b00<<6)
//RegSyncConfig(0x2e)
//7 SyncOn
#define SyncON (1<<7)
#define SyncOFF (0<<7)
//6 FifoFillCondition
//5-3 SyncSize
#define Sync8byte (0b111<<3)
//2-0 SyncTol
//RegPacketConfig1(0x37)
//7 PacketFormat
#define FixedLength (0<<7 ) //Fixed length
#define VariableLength (1<<7) //Variable length
//6-5 DcFree
#define DcFreeOFF (0b00<<5) //None (Off)
#define Manchester (0b01<<5) //Manchester
#define Whitening (0b10<<5) //Whitening
//4 CrcOn
#define CrcOFF (0<<4) //Off
#define CrcON (1<<4) //On
//3 CrcAutoClearOff
#define ClearON (0<<3) //Clear FIFO and restart new packet reception
#define ClearFF (1<<3) //Do not clear FIFO. PayloadReady interrupt issued
//2-1 AddressFiltering
#define AddressOFF (0b00<<1) //None (Off)
#define AddressNode (0b01<<1) //Address field must match NodeAddress
#define AddressNodeBroadcast (0b10<<1) //Address field must match NodeAddress or BroadcastAddress
const uint8_t RFM69ConfigTable[][2] = {
{REG_BITRATEMSB, 0x34}, //32MHz/0x3410 = 2.4kpbs
{REG_BITRATELSB, 0x10},
{REG_FDEVMSB, 0x02}, //241*61Hz = 35KHz
{REG_FDEVLSB, 0x41},
{REG_FRFMSB, 0xD9}, //868MHz
{REG_FRFMID, 0x00},
{REG_FRFLSB, 0x00},
{REG_LNA, 0x88}, //200R Auto gain
{REG_RXBW, 0x52}, //83KHz
{REG_AFCBW, 0x8B}, //recommended value
{REG_DIOMAPPING1, RxDio0PayloadReady},
{REG_RSSITHRESH, 0xEC}, //118dBm
{REG_PREAMBLEMSB, 0x00}, //5 PreambleBytes
{REG_PREAMBLELSB, 0x05},
{REG_SYNCCONFIG, SyncON | Sync8byte}, //On, 8B, no errors
{REG_SYNCVALUE1, 'A'}, //SyncWord = Network ID
{REG_SYNCVALUE2, 'T'},
{REG_SYNCVALUE3, 'N'},
{REG_SYNCVALUE4, 'E'},
{REG_SYNCVALUE5, 'L'},
{REG_SYNCVALUE6, '.'},
{REG_SYNCVALUE7, 'P'},
{REG_SYNCVALUE8, 'L'},
{REG_PACKETCONFIG1, VariableLength | Whitening | CrcON | ClearON | AddressNodeBroadcast},
{REG_PAYLOADLENGTH, 66},
{REG_NODEADRS, NodeAddress},
{REG_BROADCASTADRS, BroadcastAddress},
{REG_FIFOTHRESH, 0x9F},
{RegTestLna, 0x1B}, //Normal sensitivity
{REG_TESTDAGC, 0x30}, //Improved DAGC
{REG_OPMODE, STDBY}
};
volatile uint8_t ActiveTx, ActiveRx, DataReady;
uint8_t buffer[49]; //bufor z odebranymi danymi ( w main dodac extern buffer[49]; )
void spi_tx(uint8_t data) {
SPDR = data;
while ( !(SPSR & (1<<SPIF)) );
}
uint8_t spi_rx(void) {
while ( !(SPSR & (1<<SPIF)) );
return SPDR;
}
//! zapisuje bajt do modułu pod określony adres
/*!
\param address - adres docelowy
\param data - dane do zapisania
*/
void RFM69_write(uint8_t address, uint8_t data)
{
// DDRB|= 0b00000010;
// PORTB|= 0b00000010;
PORTD &= ~SS;
SPDR = address | 0x80; //dla zapisu adres ma MSB = 1
while( !(SPSR & (1<<SPIF)) );
SPDR = data;
while( !(SPSR & (1<<SPIF)) );
PORTD |= SS;
}
//! odczytuje bajt z określonego adresu modułu
/*!
\param address - adres docelowy
\return - dane spod adresu
*/
uint8_t RFM69_read(uint8_t address)
{
uint8_t data;
PORTD &= ~SS;
while( !(SPSR & (1<<SPIF)) ); //odczekanie na zakończenie wcześniejszej transmisji
SPDR = address;
while( !(SPSR & (1<<SPIF)) );
SPDR = 0x00; //dowolna wartość
while( !(SPSR & (1<<SPIF)) );
data = SPDR;
PORTD |= SS;
return data;
}
//! ustawia czestotliwosc pracy
/*!
\param frequency - czestotliwosc FRF(x) np. FRF(868)
*/
void RFM69_Freq(uint32_t frequency)
{
RFM69_write(RegFrfMsb, (uint8_t)(frequency>>16));
RFM69_write(RegFrfMid, (uint8_t)(frequency>>8));
RFM69_write(RegFrfLsb, (uint8_t)frequency);
}
const uint8_t RFM69RxTable[][2] = {
{RegDioMapping1, RxDio0PayloadReady},
{RegPaLevel, 0x9F},
{RegTestPa1, 0x55},
{RegTestPa2, 0x70},
{RegOpMode, RX}
};
const uint8_t RFM69TxTable[][2] = {
{RegDioMapping1, TxDio0PackedSend},
{RegPaLevel, 0x9F},
{RegTestPa1, 0x55},
{RegTestPa2, 0x70},
{RegOpMode, TX}
};
//! ustawia domyslne wartosci rejestrow modulu
void RFM69_Config(void) {
for ( uint8_t i = 0; i < sizeof(RFM69ConfigTable)/2; i++)
RFM69_write(RFM69ConfigTable[i][0], RFM69ConfigTable[i][1]);
}
//! czysci FIFO modulu
/*!
ustawia w tryb odbioru
*/
void RFM69_ClearFIFO(void) {
RFM69_write(RegOpMode, STDBY); //Entry Standby Mode
RFM69_write(RegOpMode, RX); //Change to Rx Mode
}
//! ustawia tryb uspienia
void RFM69_Sleep(void) {
RFM69_write(RegOpMode, SLEEP); //sleep mode
}
//! ustawia tryb gotowosci
void RFM69_Standby(void) {
RFM69_write(RegOpMode, STDBY); //standby mode
}
//! ustawia tryb odbioru
void RFM69_Rx(void) {
for (uint8_t i = 0; i < sizeof(RFM69RxTable)/2; i++) //config RFM69 RxMode parameters
RFM69_write(RFM69RxTable[i][0], RFM69RxTable[i][1] );
}
//! wysyla dane na podany adres wezla
/*!
\param address - adres wezla
\param *data - wskaznik do bufora z danymi
\param length - ilosc bajtow do wyslania, jak 0 to bufor traktowany jest jak C-String, max 48 znakow
\return - 0 sukces, 1 - za duzo danych, 2 - odbior w toku, 3 - nadawanie w toku
*/
uint8_t RFM69_Send(uint8_t address, uint8_t * data, uint8_t length) {
if(!length) length = strlen((char *)data);
if(length > 48) return 1;
if(ActiveRx) return 2;
if(ActiveTx) return 3;
PORTB&= ~0b00000010;
ActiveTx = 1;
RFM69_Standby();
RFM69_write(RegFifo, length + 1);
RFM69_write(RegFifo, address);
if(length) //byte data
{
for(uint8_t i = 0; i < length; i++)
RFM69_write(RegFifo, data[i]);
}
else //C-String
{
while(*data)
{
RFM69_write(RegFifo, *data);
data++;
}
}
for (uint8_t i = 0; i < sizeof(RFM69TxTable)/2; i++) //config RFM69 TxMode parameters
RFM69_write(RFM69TxTable[i][0], RFM69TxTable[i][1]);
return 0;
}
//! odczytuje dane z FIFO modulu do bufora
/*!
ustawia zmienna DataReady i umieszca w niej ilosc odebranych bajtow
\param *data - wskaznik do bufora z danymi
*/
void RFM69_Read(uint8_t * data) {
uint8_t length, address;
uint8_t i;
ActiveRx = 1;
length = RFM69_read(RegFifo);
address = RFM69_read(RegFifo);
for(i = 0; i < length - 1; i++)
data[i] = RFM69_read(RegFifo);
data[i] = '\0';
RFM69_ClearFIFO();
DataReady = length - 1;
ActiveRx = 0;
}
//! funkcja obslugi przerwania / zbocze narastajace DIO0
/*!
obsluguje odbieranie danych i przelaczanie w tryb odbioru
*/
ISR(INT0_vect)
{
extern uint8_t buffer[49];
if(ActiveTx)
{
ActiveTx = 0;
RFM69_Standby();
RFM69_Rx();
}
else
{
RFM69_Read(buffer);
}
}
void spi_init(void) {
DDRD|= SS;
PORTD|= SS;
DDRB |= MOSI|SCK|(1<<PB2);
DDRB &=~MISO;
SPCR |= (1<<SPE)|(1<<MSTR)|(1<<SPR0);
}
int main(void)
{
//konfiguracja spi , przerwan i modulu
spi_init();
RFM69_Config();
RFM69_Freq(FRF(868));
RFM69_Rx();
while (1) {// pusta pętla
}
}[/syntax]
Statystyki: Napisane przez michaak — 27 maja 2014, o 14:43
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. Pokombinuję nieco jeszcze zanim wrzucę tu main.c 